1. Field of the Invention
The present invention is a technology related to a display device and a method of manufacturing the display device. Specially, the present invention is a technology related to a display device in which pixels are formed in a Z-inversion type, and a method of manufacturing the display device.
2. Description of the Prior Art
With the development of the information society, various types of requirements for a display device for displaying an image are increasing and, recently, various display devices, such as a Liquid Crystal Display (LCD), a Plasma Display Panel (PDP), and an Organic Light Emitting Diode Display Device (OLED), are being used.
Among those display devices, a Liquid Crystal Display (LCD) device includes a display panel and a driving unit. The display panel includes an array substrate including a thin film transistor, which is a switching device for controlling on/off of each pixel area, an upper substrate including color filters and/or black matrixes, and a liquid crystal layer formed between the array substrate and the upper substrate. The driving unit controls the thin film transistor. In the LCD device, alignment of the liquid crystal layer is controlled according to an electric field applied between a common voltage (Vcom) electrode and a pixel (PXL) electrode provided at a pixel area, so as to adjust the transmittance of light and thereby form an image.
The LCD device drives a liquid crystal panel in an inversion type in order to prevent degradation of a liquid crystal and improve display quality. A frame inversion type (i.e., a frame inversion system), a line inversion type (i.e., a line inversion system), a column inversion type (i.e., a line inversion system), a dot inversion type (i.e., a dot inversion system), or the like is used as the inversion type.
Among the inversion driving types, the frame inversion type, the line inversion type and the column inversion type may reduce power consumption compared to the dot inversion type, but have disadvantages in display quality degradation such as a crosstalk phenomenon or an up-down luminance difference. Meanwhile, the dot inversion type may reduce the above-mentioned display quality degradation, and thus may provide an image with quality superior to that of the frame inversion type, the line inversion type and the column inversion type. However, the dot inversion type has disadvantages in that power consumption is too large compared to the line inversion type or the column inversion type.
A type proposed to enhance the above-mentioned problems is a Z-inversion type (i.e., a Z-inversion system). The Z-inversion type is a method in which a Thin Film Transistor (TFT) and a pixel electrode (P) are alternately disposed on left and right of data lines, and a data voltage is provided to the data lines in a column inversion type. That is, the Z-inversion type is an enhanced structure of the column inversion type in which a circuit driving method of the Z-inversion type uses the column inversion, but a screen display is implemented in the same manner as the dot inversion type (i.e., the dot inversion system) by forming TFTs of a liquid crystal panel in an opposite direction with respect to each line. Specifically, the Z-inversion type has an effect similar to that of the dot inversion type with regard to display quality, and uses the column inversion type with regard to data. Thus, the Z-inversion type is a method capable of providing superior image quality and reducing power consumption.
FIGS. 1A and 1B illustrate a thin film transistor positioned in a pixel of a Z-inversion type display device.
In the Z-inversion type display device, a channel of a TFT disposed in some pixels (e.g., pixels disposed in an odd row) is formed in a left direction, and a channel of a TFT disposed in other pixels (e.g., pixels disposed in an even row) is formed in a right direction.
Referring to FIG. 1A, a channel of a TFT disposed on the upper side is formed in a left direction, and a channel of a TFT disposed on the lower side is formed in a right direction.
A drain electrode (i.e., an electrode electrically connected to a pixel electrode) of the TFT should be disposed to the left of a source electrode such that the channel is formed in the left direction. On the contrary, the drain electrode of the TFT should be disposed on the right of the source electrode such that the channel is formed in the right direction.
As described above, in the Z-inversion type display device, a direction in which the drain electrode of the TFT is disposed with respect to the source electrode is different in each pixel. Specifically, the direction in which the drain electrode is disposed with respect to the source electrode in an odd-numbered pixel and the direction in which the drain electrode is disposed with respect to the source electrode in an even-numbered pixel are different.
FIG. 1A illustrates a drain electrode position in a normal case.
Referring to FIG. 1A, an area where a drain electrode 20a and a gate electrode 10a of the upper TFT of which the channel is formed in the left direction are overlapped is substantially the same as an area where a drain electrode 20b and a gate electrode 10b of the lower TFT of which the channel is formed in the right direction are overlapped.
An area where a drain electrode and a gate electrode of a TFT overlap forms a capacitor having a capacitance, and the capacitance is referred to as Cgs. At this time, the capacitance Cgs is determined according to an overlapped area. In the normal case shown in FIG. 1A, the capacitances Cgs of the above-mentioned two TFTs are the same.
Meanwhile, FIG. 1B illustrates a drain electrode position in a case in which a gate electrode layer and source/drain electrode layers are horizontally misaligned by 2.5 um.
The gate electrode layer and the source/drain electrode layers are formed on different layers using different masks. At this time, a reference position of a mask for forming the gate electrode layer and a mask for forming the source/drain electrode layers may be minutely misaligned, for example, the reference position may be horizontally misaligned by 2.5 um. When the reference position is misaligned as described above, the drain electrode may be formed as shown in FIG. 1B.
Referring to FIG. 1B, an area where a drain electrode 20c and a gate electrode 10c of the upper TFT of which the channel is formed in the left direction are overlapped is smaller than an area where a drain electrode 20d and a gate electrode 10d of the lower TFT of which the channel is formed in the right direction are overlapped.
When the areas where the drain electrode and the gate electrode overlap are different as described above, the capacitances Cgs formed in each TFT are different. In the case of FIG. 1B, Cgs of the upper TFT is smaller than Cgs of the lower TFT.
The capacitance Cgs lowers a voltage charged in a pixel, due to a coupling phenomenon which is generated during a gate off, a level of the lowering of the charged voltage is differently determined according to the capacitance Cgs. Therefore, when the capacitances Cgs are different in each pixel, the level of the lowering of the charged voltage in each pixel by the capacitances Cgs becomes different, and thus a charged voltage in each pixel becomes different.
As described above, in the case of the Z-inversion type display device, the gate electrode layer and the source/drain electrode layers may be misaligned for reasons such as a mask misalignment, and, at this time, there are problems in which the capacitances Cgs of each pixel become different.
Therefore, in the Z-inversion type display device, nonuniformity between pixels occurs according to the above-mentioned change. Thus, flickering occurs or a vertical line defect occurs.